Optimizing Power Consumption in DSP Designs

Determining the optimum power consumption for a DSP system is important but has been traditionally difficult to achieve. Using advanced process technology and chip design expertise, TI has provided new methods for controlling power consumption in its TMS320C55x line of power-efficient DSPs. DSP/BIOS realtime kernel-managed low-power modes and voltage and frequency scaling are among the techniques that give system designers some degree of control over power consumption in different design scenarios. In addition, power consumption spreadsheets provide more exact information, and advanced tools enable developers to first profile, then optimize the power consumption of their C55x DSP designs. By combining these resources with powerefficient design techniques, developers can create systems that save space, dissipate less heat, extend operation between battery charges, and promote reliability for end-product users.