No Government Bailout for Poor Test Planning

A technology shift occurred recently that impacted the semiconductor industry—mostly because of changes in silicon fabrication processes that enabled higher performance and integration. A side effect was that the number of timing-related defects not detectable with standard production patterns increased to the point that special tests had to be added. The problems of applying more tests to detect the newer defects and how to apply accurate at-speed clocking during the test became critical. If standard practices were used, then very costly testers and additional test patterns and time were necessary which would be a huge cost burden. The other option was to not apply the additional tests and suffer the penalty of more defective parts getting to customers. Several solutions were developed in the past few years to address these and other emerging test questions.