BIST Techniques for Delay and Jitter

As on-chip delays-of-interest range from nanoseconds down to picoseconds, off-chip delay measurement techniques are limited by fundamental properties of signal access paths, such as noise and impedance variation. This tutorial discusses most of the papers published in the last 10 years that provide silicon results for on-chip measurement techniques, and a few that include only simulated results, to discover the most promising directions for characterization and production testing of IC signal timing parameters such as delay, jitter, and pulse width.