Tech Papers
Introduction to CPLD and FPGA Design
Embedded Systems Conference (ESC)
Bob ZeidmanConference Paper
June 2006
The first sections of this paper deals with the internal architecture and characteristics of these devices. Simple programmable logic devices are described in an overview, leading up to a detailed description of the Complex Programmable Logic Device and the Field Programmable Gate Array. The various architectures of these devices are examined in detail along with their tradeoffs, which allow you to decide which particular device is right for your design.
The next sections of this paper discuss in detail, the design, simulation, and testing issues that arise when designing a CPLD or FPGA. The final sections of this paper examine new architectures of programmable devices and the software needed to support them. Understanding these issues will allow you to design a chip that functions correctly in your system and will be reliable throughout the lifetime of your product.




