Processor architecture not a factor for low-power mobile systems

Mobile consumer electronics devices are generally built from some combination of the components shown in Table 1.

Ultimately these machines must serve their human users by tickling the senses. The human eye requires a certain amount of incident light energy to clearly see an image. That sets a minimum amount of light power per unit area that a display must emit. The 1.7 inch display of a clam shell flip phone requires about 150 mW, a 3.5 inch smart phone display requires about 600 mW, an 8.4-inch mobile internet device display requires about 3 watts, and a 15-inch notebook computer display might require 10 watts. Those numbers do vary significantly depending on how the user sets the brightness control.

Similarly the human ear requires a certain amount of air pressure wave energy to clearly hear sounds. That sets a minimum amount of audio energy that a speaker or headphone must emit. Earbuds require only about 20 mW, a handset speaker requires about 50 mW, full headphones require about 100 mW, the built-in speakers of notebook computers require about 300 mW, and built-in speakers of the iMac require 2.4 watts. Those numbers will vary significantly depending on how loud the sound is and the duty cycle with which the speakers are used.

HDD and optical drives have moving parts and multiple electric motors to drive them and require 150 mW in stand-by mode up to 2.5 watts in seek mode and some average power consumption in between depending on the duty cycle with which data is accessed. A 1% duty cycle is typical for MP3 playback and a 20% duty cycle is typical for video playback though the numbers vary by coding quality, compression, and operating system.

Wireless 2-way communication requires emitting enough electromagnetic radiation (EMR) to communicate over long distances through and around obstacles. Maximum transmission power in the frequency bands used by communications standards is limited by US FCC and other government regulations. Bluetooth uses 2.5 mW, Wi-Fi uses 32 mW in mobile devices, unlicensed commercial FM transmission uses 100 mW, GSM phone transmission during a call typically averages about 500 mW from a handset while WCDMA averages about 650 mW. Handset power tends to be higher for wireless internet access, though occurring only in bursts.

Even receiving wireless broadcasts requires significant power in the radio to extract the intended signal from all other EMR in the environment. GPS reception requires about 100 mW, ISDB-T 1seg television reception requires about 100 mW while DVB-H and DVB-T television reception requires about 200 mW.

Wired communication requires charging cables that, in many cases, contain more metal than all of the traces on the PC boards and chips of the device combined. Driving Ethernet signals is often 300 mW or more, USB interfaces require about 100 mW though USB is special in that it can be used as a power source to recharge the battery of some mobile devices.

In comparison to the other physical requirements of mobile system designs, the processor is a small component, both physically and in the power budget. All of the digital processing required for MP3 audio decode requires less than 1 mW of processing power, on some processors. Running an operating system with networking capability, a file system, and controlling audio and a user interface requires only tens of milliwatts. High-def H.264 video encode, one of the most processing intensive tasks performed in mobile consumer electronic devices, requires about 250 mW.

Add up all of the components, as shown in Figure 1 and Figure 2 below, and it quickly becomes apparent that many mobile devices use watts of power but the power used by the processor is at most a small fraction. Some clever system designs take advantage of this fact and apply extra digital processing algorithms to reduce the power required by other components of the system. For example, a contrast enhancement filter on video can make it look good even at lower LCD panel brightness. Similarly, data-compression techniques can reduce the amount of data and therefore the power transmitted across wireless or wired networks.

Figure 1: Apportioning of power across a handheld device showing how little is consumed, relatively speaking, by the core processor.

Figure 2: Processor power as a portion of overall power consumed over a range of portable devices.

Today's CPU chips in mobile devices use little power for brilliantly complex processing tasks mainly by virtue of chip design and manufacturing techniques including: smaller fab process technologies, newer semiconductor materials, the use of co-processing accelerators implemented with on-chip power domains, clock gating, and mixed VT standard cell library design.

Achieving today's levels of processor performance has also required implementing advanced processor microarchitectural techniques, even in chips for low-cost consumer electronics. Deep pipelines increase clock speed. Superscalar designs increase instructions per cycle. SIMD increases data processed per instruction. Large and multi-level caches decrease idle clock cycles. Multiple cores increase the number of simultaneous software threads. Each technique improves processor performance but adds power and silicon cost. Any of the major instruction sets (x86, ARM, PowerPC, MIPS, or SPARC), if well implemented with the same pipeline depth, multiple-issue logic, 128-bit SIMD extensions, cache structure, and core count will yield similar performance and power consumption for any given set of tasks well programmed on the processor. The instruction set has negligible effect on the power efficiency of general-purpose processors.

The ARM 9 processor found in many mobile handsets consumes far less power than the Intel Celeron processor found in many notebook computers. However, it would be unwise to conclude that the instruction set of the ARM is better designed for low power consumption than the Celeron. The ARM 9 has much lower performance because of its relatively simple microarchitecture. The ARM Cortex A9 and Intel Atom processor designs have comparable microarchitectures. Only after each is fabricated in the same process technology and well programmed for the same functions will a meaningful comparison of the effect of their respective instruction set architectures on power consumption be possible.

Software ecosystems are built around processor architectures including compiler, debugger, simulator, and operating system. In the past that created a barrier to porting interesting application software between processors. With the growing use of Linux, browsers, and Java and the likely increase in use of Android and cloud computing, interesting applications are becoming available on devices with different processors. Layers of abstraction are making processor instruction sets less relevant. This is already creating opportunities for apps to more easily be developed to run on x86 and ARM. That allows ARM to run apps that used to only be available on PCs. It also allows x86 processors to be used for wireless network attached devices known as mobile internet devices (MIDs) or netbooks.

Jonah Probell is CEO of YAP IP (www.yapip.com) and an impartial analyst of the microprocessor industry. He can be reached at jonah@jonahprobell.com.