Got OCP? The Role of the OCP in Multicore Designs

By comparison, today's high-end System-on-Chip (SoC) designs boggle the mind and defy description. Comprising tens or hundreds of millions of logic gates, these beasts typically feature multiple processor cores performing different tasks, tiered memory structures with multi-level memory caching, and multi-layer bus structures (and don't get me talking about super-pipelining and super-scaling).

The problem is that the vast majority of these bits-and-pieces " like the processor cores and other functions " come in the form of third-party IP blocks. The process of building an SoC involves gathering processor, peripheral, and memory cores from a wide variety of sources. Furthermore, there is a temporal aspect, because these cores may have originated at different times.

The function of a core dictates its interface to the outside world (in the form of the rest of the chip). There's no way we can expect that everyone who created cores at different times in different places for different purposes all made the same decisions. Thus, the designers of a modern SoC are in the position of constructing the chip out of functional units that they did not themselves devise, and that they almost certainly do not understand at some level.

(If designers did need to fully understand the internals of each and every core, they might as well design them all from the ground up, which would result in a new chip reaching the market once every hundred years or so.)

Obviously, some way to address these multicore problems is required. But fear not my braves ("There's nothing to fear, but fear itself," as my dear old dad used to say), because there is a solution in the form of the OCP (Open Core Protocol). In order to wrap our brains around this we need to ask (and answer) three fundamental questions:

* What is a multicore design?
* What is a socket?
* What is the OCP?

OK, who wants to go first? What, you want me to explain all of this? I'm flattered. But what makes you think I know anything about it (not that lack of knowledge has held me back before)? Oh well, if you insist...

What is a multicore design?
I always like to make sure I have things clear in my head, so let's take this step-by-step, starting with the concept of multiple processors. In reality, we've been using multi-processor systems in "Computer Space" ("Where no-one can hear you scream") for a long time. Consider a simple Personal Computer (PC) circa 1995, for example. In addition to the main microprocessor on the motherboard, there would also be a smaller processor in the hard disk drive, and even a tiny processor in the keyboard.

In fact, even the simplest of today's PCs tend to have processors scattered around like confetti. However, this type of multi-processor implementation is relatively simple, because all of the processors are independent. The main, general-purpose processor handles the bulk of the work, while the smaller, special-purpose processors handle a limited number of specialized tasks. Furthermore, each processor is the "master of its own domain" in the sense that it has absolute control over its own resources, such as its local memory sub-system.

Another multi-processor scenario involves a number of identical processors sharing common resources; for example, a group of processors sharing the same memory space. Consider the "Big Iron" machines of the 1970s, such as the IBM mainframes and Crays, for example.

All of which leads us to the concept of "multicore," which refers to multiple processor, peripheral, and memory cores on the same silicon chip. One example of this would be the multicore processors from Intel and AMD, each containing two, four, or more identical (homogeneous) processor cores sharing common resources.

But off-the-shelf microprocessors are not what we're interested in here. For the purposes of this article, we are pondering the creation of high-end SoC devices. In this case, while it is true that homogeneous implementations involving multiple copies of the same core are more general-purpose and more flexible, heterogeneous realizations comprising a variety of specialized cores assigned to specific tasks are more efficient.

And, in reality, we can have a mixture of homogeneous and heterogeneous cores on the same chip. The ARM Cortex-A9, for example, is available with two, three or four homogeneous cores (designers can lay down multiple such clusters on the chip if they so-desire). These cores can then be augmented with specialized cores from other vendors.

The end result is like having a supercomputer on a chip, with incredibly complex combinations of processors scattered across the die. The challenge is how to deal with the heterogeneous nature of all of this...