DDR3 memory interface controller IP speeds data processing applications

DDR3 memory systems can provide a significant performance boost to a variety of data processing applications. However, compared to previous generations (DDR and DDR2), DDR3 memory devices have some new requirements. In order to fully capitalize on the benefits of DDR3 memories, it is important to have an efficient and easy to use DDR3 memory interface controller. A video processing application provides a good example of the key requirements of a DDR3 memory system and the features needed from a DDR3 Interface in similar stream-oriented data processing systems.

Video processing systems push data bandwidth requirements to the maximum: the more data that can be processed, the more cost effective the system becomes. Video aggregators and routers can process many video streams in parallel, so matching the data processing capabilities and video bandwidth requirements can be a challenge. FPGAs can provide a great deal of processing power by creating multiple video processors inside a single FPGA. The challenge then is to get data in and out of the FPGA as fast and efficiently as possible. A DDR3 memory system can, in many cases, provide enough bandwidth for these FPGA-based systems.

Our target video processing design operates on four video sources to convert and compress video data into a format for transfer to a storage hub over a PCI Express interface. The main blocks of the system are shown in Figure 1.

Figure 1: Video Processor Block Diagram (click on image to enlarge).

The four streams of video source data are captured and buffered within the FPGA. These FIFO buffers are emptied by the DDR3 Memory Controller and stored within the DDR3 memory. Once a full packet of video data is stored, the video processor requests the data from the DDR3 Memory Controller, which reads the data and provides it to the video processor. The video processor formats and compresses the video data and writes it back to the memory via the DDR3 memory controller. When a video data packet is completely processed and ready to be transferred over the PCI Express Interface, the video processor obtains the data from the DDR3 Memory Controller and passes it to the PCI Express Interface.