Reusable VHDL IP in the real world

At RF Engines, we find that reusing existing IP is very desirable. Not only does it save us development time and help us fulfil challenging delivery requirements, but making use of pre-proven components also helps give customers confidence in our designs.

Another dimension to this is that multi-FPGA designs are becoming increasingly widespread, and there are obvious advantages to having a chip-level infrastructure that is reusable within the project.

Reuse, then, is clearly A Good Thing. However, in practice it has often proven surprisingly difficult to achieve. So it is worth bearing in mind a few principles and techniques that can be applied to make it more straightforward. Though it would be foolish to say that creating reusable VHDL doesn't require any extra effort, it frequently pays significant dividends in the longer term.

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