Logic 101 - Part 2 - Positive vs Negative Logic

Part 1 – Assertion-Level Logic
Part 2 – Positive vs Negative Logic
Part 3 – Reed Muller Logic
Part 4 – Gray Codes

Before plunging into the fray, it is important to understand that logic 0 and logic 1 are always equivalent to the Boolean logic concepts of False and True, respectively (unless you're really taking a walk on the wild side, in which case all bets are off). The reason these terms are used interchangeably is that digital functions can be considered to represent either logical or arithmetic operations (Fig 1).

1. Logical versus arithmetic views of a digital function.

Having said this, it is generally preferable to employ a single consistent format to cover both cases, and it is easier to view logical operations in terms of "0s" and "1s" than it is to view arithmetic operations in terms of "Fs" and "Ts". The key point to remember as we go forward is that logic 0 and logic 1 are logical concepts that have no direct relationship to any physical values.

Physical-to-abstract mapping (NMOS logic)
OK, let's gird up our loins and meander our way through the morass one step at a time. The process of relating logical values to physical voltages begins by defining the frames of reference to be used. One absolute frame of reference is provided by truth tables, which are always associated with specific functions (Fig 2).

2. Absolute relationships between truth tables and functions.

Another absolute frame of reference is found in the physical world, where specific voltage levels applied to the inputs of a digital function cause corresponding voltage responses on the outputs. These relationships can also be represented in truth table form. Consider a logic gate constructed using only NMOS transistors (Fig 3).

3. The physical mapping of an NMOS logic gate.

With NMOS transistors connected as shown in Fig 3, an input connected to the more negative Vss turns that transistor OFF, and an input connected to the more positive Vdd turns that transistor ON. The final step is to define the mapping between the physical and abstract worlds; either 0v is mapped to False and +ve is mapped to True, or vice versa (Fig 4).

4. The physical to abstract mapping of an NMOS logic gate.

Using the positive logic convention, the more positive potential is considered to represent True and the more negative potential is considered to represent False (hence, positive logic is also known as positive-true). By comparison, using the negative logic convention, the more negative potential is considered to represent True and the more positive potential is considered to represent False (hence, negative logic is also known as negative-true). Thus, this circuit may be considered to be performing either a NAND function in positive logic or a NOR function in negative logic. (Are we having fun yet?)