IIDC2--A new dawn for industrial digital video cameras
Reducing energy cost of intra-chip communications
How to use the CORDIC algorithm in your FPGA design
It's a vision thing – creating an optical computer memory
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Use a twist (and other popular wires) to reduce EMI/RFI
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Book Excerpt: How to engineer EM circuits, Part 2
Time is money! A quick fix for those pesky FPGA design errors
Sophisticated thermal management solutions cool hi-rel systems - Part 2
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The Programmable Logic Designline is edited by Clive (Max) Maxfield. Here in programmable logic space (where no one can hear you scream) we are interested in anything and everything to do with programmable logic, including FPGAs, CPLDs, CSSPs, PSoCs... along with their associated design and verification tools and flows... Please contact 