Packaging designs for radio-frequency ICs

The performance of a radio-frequency integrated circuit can be dramatically affected by the package environment, yet packaging technology has received comparatively little attention compared with IC fabrication technology or RF IC design.

The wireless industry is undergoing tremendous growth, spurred in part by small, low-cost RF ICs. The simplest RF ICs perform a single, discrete function, such as amplification or mixing. These chips are usually less than one square millimeter in area and require fewer than a dozen connections to off-chip circuitry. More involved RF ICs can contain complete receive and/or transmit chains into the total RF portion of a radio. These transceiver chips require several dozen high-frequency I/O connections to the printed-circuit board. The accompanying table is a brief list of typical frequencies used by RF ICs.

The recent trend in new commercial frequency allocations is toward higher frequencies. For instance, 5-GHz WLAN and 12-GHz Direct Broadcast Satellite (DBS) have all been commercially exploited. This has rendered obsolete the old design approach of emphasizing the mechanical characteristics of packages while disregarding the RF performance. Any new package design must consider RF performance of equal priority to mechanical concerns, since lead-frame parasitics can cause the package to seriously degrade RF IC performance, if not render the chip unusable.

The ideal package creates a transparent link between the printed-circuit board signals and the silicon chip. Any deviation from the ideal package causes the input signal to be degraded. This degradation manifests itself in three ways: excessive insertion loss, insufficient return loss and pin-to-pin isolation.

Plastic package technology has been the workhorse of the IC industry for many years, and this will continue for the foreseeable future. Plastic offers low cost and relatively high performance. Ceramic-leaded packages have been developed for high-performance applications, such as DBS service at 12.2 GHz to 12.7 GHz and local multipoint distribution service at 24 GHz to 32 GHz.

A four-lead ceramic package costs roughly $5 per package in volume while plastic leaded packages cost approximately one cent per lead in volume. Traditional ceramic packages are thus significantly more expensive than plastic approaches.

Despite their large self- and mutual inductances, bond wires continue to be the dominant technique to connect an RF IC to the package. Bond wires are very robust and inexpensive, and can tolerate die thermal expansion and placement uncertainty. However, their inductance creates significant challenges for RF IC design, as well as some unique opportunities. For example, wire-bond inductors have been used as resonators in RF voltage-controlled oscillators as well as matching elements in monolithic distributed amplifiers.

Wire-bond inductance has been extensively studied recently, and there is substantial literature published on the value of inductance, mutual inductance and capacitance. The wire-bond inductance is dependent on the length of the bond wire and the cross-sectional area.

More accurate models of wire-bond inductance require full 3-D simulations, and account for the curvature of the wire bond, as well as the height above the ground plane. Values of approximately 1 nanohenry/mm are commonly used as a rule of thumb, but more accurate results are often required.

The inductances associated with the lead frame naturally suggest that the package performance could be significantly improved if the lead frame could be formed into a transmission linelike structure with the appropriate characteristic impedance. This would increase the bandwidth of the resulting package significantly and minimize reflections at the various transmissions into the package.

This approach was recently adopted to increase the useful bandwidth of an SSOP-8 package to well over 10 GHz. In this case, the package lead frame was modeled as an embedded coplanar waveguide with finite grounds (ECPWFG) structure, and the characteristic impedance was directly calculated. The lead-frame design was slightly modified to present a 50-ohm characteristic impedance to the pc board. The resulting package exhibited improved performance compared with the standard SSOP-8 package, with return loss greater than 20 dB to 11 GHz, and insertion loss less than 1 dB. This type of "engineered" lead-frame design holds great promise for increasing the performance of RF packages at higher microwave frequencies.

Flip-chip technology

Flip-chip technology offers an opportunity to reduce the inductance associated with mating of the IC die to the package or substrate. The flip-chip solder bumps are typically fabricated from alloys of indium and lead, although lead-free stud bumps have also become popular. In many cases, the inductance of the solder bump can be reduced to approximately 50 picohenries, significantly less than the 1 nH/mm of a bond wire. Other advantages of this approach include the ability to place these connections near the center of the die, improving the flexibility of the system partitioning and reducing the ground inductance in the interior portions of the chip. Flip-chip approaches are also well-suited to ball grid array packages, which exhibit very low inductance, as shown in the accompanying figure.

The combination of the ball grid array package and flip chip represents a significant improvement in microwave performance over the traditional leaded-package approach with wire-bond attachment.

The major drawback limiting flip chip today is the increased cost-roughly two to three times the cost of an equivalent wire-bond attachment on a per-pin basis. In addition, the wire-bond pitch can be substantially less than that of an equivalent flip-chip pitch, and staggered bond wires can reduce the wire pitch even further.

Low-temperature co-fired ceramic (LTCC) material provides an alternative low-cost packaging approach for RF ICs. LTCC layers are built up on individual layers of flexible ceramic tape (so-called "green tape") and are then pressed together and fired at temperatures approaching 900 degrees C. The resulting multilayer ceramic structure exhibits relatively low loss and shrinkage. High-performance passive microwave components can be essentially built into the substrate, since high-conductivity metals such as gold and silver can be employed due to the low firing temperature. This ability to integrate the high-performance passive components into the package in a low-cost way is the compelling attribute of this approach.

This technology was originally developed for military applications but has recently found its way into various commercial products. For example, a WCDMA downconverter was demonstrated by Mitsubishi, which used the capabilities of LTCC to great advantage. In this case, an even-order subharmonic direct-conversion receiver was implemented.

Several key passive components, including the interstage filtering, hybrid phase shifter and power splitter, were all implemented on the LTCC substrate. The resulting silicon germanium heterostructure bipolar transistor die size was very small, since many of the passive components were implemented on the LTCC, and flip-chip technology was employed to connect the die to the board with low parasitic inductance. The overall dc current requirements were only 12 milliamps for the complete downconverter.

Another example of the creative use of LTCC is a Bluetooth receiver implemented by Ericsson, where the flip-chip assembly was employed, and transmit/receive filter and baluns were implemented on the substrate.

The key limiting feature of LTCC is still related to issues of manufacturability and cost. Uneven shrinkage of the tape during firing has historically been a problem, although this has improved in recent years. Another factor limiting adoption of LTCC is that the performance of passive devices on IC dies is itself improving dramatically; inductor Q's are improving because of thicker metallization and the use of copper and metal-insulator-metal (MIM) capacitors are shrinking in size because of the use of thinner dielectrics. The relative attractiveness of LTCC technology requires constant reexamination in light of these ongoing improvements.

The SIP solution

The needs for increasing levels of integration are driving packaging technology toward ever-more-creative solutions for combining RF and digital functions in a common package. The traditional approach to this challenge is to combine all of the functions-RF, analog/mixed signal and digital-onto a common integrated circuit substrate.

Although a fully integrated approach can lead to an attractive solution in some cases, it is often less than optimum from a system perspective. If the most advanced digital technology is employed for this single-chip solution, then the performance of the RF and analog components is compromised because of the lack of high-performance passive devices and immature device models.

The authors would like to acknowledge many valuable discussions with Dr. Kenji Itoh of Mitsubishi Electric, Dr. Donald Lie of Microtune and Dr. Marcos Karnezos of ChipPac.

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