Pattern matching: A picture is worth a thousand rules

Figure 1: Growth in number and complexity of physical verification rules

This explosion in size and complexity has impacts throughout the IC manufacturing flow that include increased difficulty reaching physical implementation closure, longer physical verification run times, and escalating debugging difficulty and timelines. With many layout issues now arising from both multi-dimensional interactions and combinations of measurements related by complex functions, detection of troublesome features can become a “needle in the haystack” hunt.

Imagine trying to describe even the simplest structure, say, a three-dimensional box, using only words. Now draw a simple picture, and anyone in the world will immediately recognize that object. Pattern matching replaces tedious text-based rule programming scripts with a library of visual shapes and patterns representing geometric configurations that should be identified and removed from the physical design before they cause failures in manufacturing.

With this visual representation capability, pattern matching opens up a whole new way to define, manage, and process design rules, and allows designers and foundry personnel to communicate via a “language” that they both speak fluently. This article discusses the conditions that have created the need for this technology, the identification and creation of patterns, the pattern matching process, and the benefits derived from its use.

The need for pattern matching
The majority of physical verification requirements are based on one simple concept: certain geometric shapes cannot be successfully manufactured with a given process. Historically, these configurations have been identified by the failure analysis (FA) group, who would then generate a geometric representation of the problematic feature(s) and derive an engineering specification (design rule). This design rule would be passed on to someone whose responsibility was to interpret the rule and write a new design rule check using the physical verification scripting language that accurately represented the original pattern and design rule constraints. This design rule check would then be added to the rule decks used for physical verification.

This process worked well while most constructs could be defined with simple one-dimensional checks (length, width, distance, etc.). However, as we reached the advanced nodes of the nanometer era, shapes became more complex, and the interactions between features became multi-dimensional. Some configurations are now so complex they cannot be accurately described with existing scripting languages, inevitably resulting in checking errors. Additionally, significant time and expertise must be spent in the attempt to reach congruence between the original intent of the design rule and its implementation as a design rule check. Figure 2 illustrates the change in complexity in design constructs.

Figure 2: Traditional single dimensional construct compared to today's complex, multi-dimensional configurations

Additionally, as advanced nodes are being implemented, problem configurations are now being defined well before silicon production, generally by the teams using lithography and optical process simulations. These teams also need the ability to capture and transfer these patterns to the design teams.

By eliminating the abstraction and derivation, and using the original visual representation of the configuration, we can dramatically simplify the process of defining and transferring the problem configuration information to the designer. Using visual geometries eliminates the need to use a syntax that is an abstraction of the original configuration, while using a “language” (pictures) that everyone can readily understand. The simplification that can be achieved through pattern matching not only reduces the size and complexity of the rule deck, but also increases the accuracy and precision of the DRC process.