Forging a Brighter Future in High Tech

History in the volatile high-tech sector has shown many times that the availability of new tools and methodologies is a significant enabler in the rapid recovery and growth of new markets. High-tech companies today are moving to the latest fabrication processes and improving their tools and design methodologies so that they will be well positioned to ride the next wave of growth as the industry recovers. These new approaches require the EDA and design communities to work closely together.

Technical conferences continue to be one of the best and most cost-effective mechanisms for fostering these close relationships and finding out what other organizations are doing. For the high-tech design industry, there is no better place than the Design Automation Conference (DAC) to learn about the latest in design tools and methodologies. At DAC, the best and the brightest in the EDA and design communities come together for five days to exchange ideas, debate promising new developments and share hot new products and innovations for all aspects of system and integrated circuit design. Attendees are exposed to new ideas and technologies from industry experts, university researchers and, of course, their peers and colleagues.

More than 10,000 participants are expected to attend DAC this summer in Anaheim, CA from June 2-6. Along with the sessions and panels, the conference will showcase more than 200 exhibiting companies and over 200 papers as well as two dynamic keynote speakers and various workshops and tutorials. In addition, throughout the weeklong conference, the DAC Pavilion will host a portion of the technical program on the exhibit floor. Attendees can participate in panel debates in pavilion-exclusive panel sessions, view live broadcasts of selected technical sessions and keynotes on the exhibit floor, meet winners of the student design contest, and ask questions of the Tuesday keynote presenter.

New at DAC this year, are a special one-day Management Focus program which is co-sponsored with the Fabless Semiconductor Association oriented to managers and executives of design companies and a Consultant's Expo, where experts in many fields can meet with people who can use their services.

Although a myriad of topics will be addressed throughout the week, some have attracted more attention this year. For example, the major theme of this year's DAC is power management, which is a big concern as design moves solidly into the nanometer region and portable consumer applications gain in acceptance. More powerful tools and methodologies are required to more effectively address the power/performance trade-offs within a single design; for example, dynamic adjustment of clock and supply voltage.

This year's DAC is devoting a substantial number of sessions to the topic of power management. In fact, DAC's 40th anniversary celebration kicks off on Monday, June 2 with a full-day tutorial entitled "Design Techniques for Power Reduction." Then, throughout the week, seven hands-on tutorials will focus on "Signal and Power Integrity Analysis and Methodology," offering technical insights on the issues, followed by guided hands-on experience with commercial tools and solutions for power analysis and reduction in today's chips. Since the available slots in the hands-on tutorials are limited, these very popular tutorials are quickly filling up.

Embedded design continues to be a major focus this year. More designers are constructing complex systems containing one or more processors. The challenge is to manage, partition, develop, and verify the design of complex systems on chip (SoC) that include embedded processors and significant intellectual property (IP). DAC offers multiple sessions on embedded design literally every day of the conference, covering issues for both embedded hardware and software. The objective, of course, is a software/hardware codesign solution that allows designers to efficiently explore a design space in which hardware and software modules are simply viewed as alternative functional implementations. Tuesday's keynote and nine sessions are devoted to embedded systems in the Technical Program, including, for example, a session on embedded hardware design case studies.

There will also be plenty of discussion about the design of silicon that supports low-cost wireless systems (for example, 3G, 802.11, and Bluetooth). As wireless systems absorb more functionality, system designers will want to explore a variety of possible configurations as early as possible in the design cycle. System designers need a way to assess the effect of optimizing the analog/mixed signals with respect to the digital signal and vice versa. This year's DAC addresses the design challenges of wireless system design including the simulation and optimization needs. A special session on the topic includes papers on seamless multi-radio integration, RF SoC design, and new techniques for non-linear behavioral modeling of microwave/RF ICs.

Of course, managing design and verification of mixed signal and large digital chips in < 0.1 micron processes is a pressing issue for many designers. Nanometer technology enables the development of complete SoCs. Managing and partitioning these complex SoCs requires combining hardware and software development tools from a variety of vendors into an efficient, unified design and verification environment. Only with a true system-level design and verification can designers create true SoCs that will be a success on the first turn. A full-day tutorial on the last day of the conference will examine all the nuances of SoC design. It will present state-of-the-art in system-level integration and also address the issues related to test and diagnosis of SoCs.

The other challenge is performing adequate physical verification of these high-density designs that contain analog mixed-signal circuitry along with millions of digital transistors. Higher operating frequencies, tighter metal pitches, and relatively long interconnect demand that designers pay close attention to crosstalk and inductive effects. One way to handle this in the design phase is with better models and faster simulation. It is also necessary to support more complex on-chip communication systems with, for example, on-chip error-correction. Here again, DAC offers several sessions and tutorials that examine different aspects of these exceptionally challenging topics.

At DAC, not only are these topics covered in the technical program, but available solutions are also demonstrated by the many exhibitors on the trade show floor. Technical conferences and trade shows, especially when combined together, are a great way to identify emerging trends and to keep abreast of the newest design technologies. And for the latest in high-tech design, there is no place like DAC to bring together EDA developers and designers to learn about the key developments in next-generation design capabilities—the issues and advancements that can help the design industry build for a brighter future.

Ian Getreu is vice president of business development for Ambric and chair of the 40th Design Automation Conference.