See Solutions to 2005's Technology Challenges at DAC

As we move from the New Year through January and into February and beyond, we are well into the preparations for the Design Automation Conference (DAC) where the electronic design industry exchanges information on new tools and technologies, management practices, products, methodologies and processes. That this year will be no different was clear at the recent meeting of this year's Technical Program Committee. In fact, this year's technical program promises five full days of discussions on the most timely and difficult challenges facing design teams worldwide: submitted technical papers, special sessions, and panels. And with over 200 exhibitors, the floor will be full of demonstrations of the latest products.

I don't need a crystal ball to tell you that design for manufacturing (DFM), power and signal integrity, electronic system level (ESL) design and design verification continue to challenge even the most experienced electrical engineer. As we go further down into even smaller geometries, complexity becomes much more than a buzz word.

Here are my predictions for 2005:

The electronics industry is changing as it responds to demands from consumer electronics, automotive and wireless communications communities. With applications shortening design cycles and driving solutions, we're seeing more ESL tools and new approaches for design reuse to enable faster and more efficient time to market cycles. Portable devices have forced us to reconsider power reduction and mixed-signal design is again a hot topic as we devise interfaces to the consumer.

DFM becomes more critical designs move to smaller geometries. The industry is facing disparate problems as it tries to handle both ESL (pulling up) and DFM (pushing down). Increased productivity means design at a higher level, but with more and more detailed information bubbling up; smaller dimensions mean the need to understand the detailed manufacturing challenges at the higher level to utilize every nanometer. ESL is happening, and foundries, designers and tool developers must work together to make increased yield possible.

Though some view formal verification as the only way to test a chip's accuracy, simulation and acceleration continue to play an enormous role. Simulation isn't going to go away, and formal methods aren't, either; analytic and test-case methods in the future will combine to get the design cycle under control.

And, what about an integrated design flow that's been promised to the design community for more years than I can remember? From the looks of the DAC program, we're getting closer, but we're still on the way.

At DAC, you can be assured that these challenges will be debated and disputed in an open and lively environment. Down one escalator ride, the electronic design automation (EDA) companies from the established to the emerging and entrepreneurial will be on the exhibit floor with answers to many of today's design challenges.

The 42nd DAC Conference
The 42nd DAC will be held June 13-17, 2005, in Anaheim, CA, and promises discussion on all of these important challenges. More details on DAC are found at http://www.dac.com. Don't miss out; complexity waits for no one and no design tool.

About the Author