Design Article
Maintain USB signal integrity when adding ESD protection
Edwin Romero, ON Semiconductor
10/21/2008 5:23 PM EDT
Eye Diagrams
The effect of added capacitance on bandwidth and signal quality can be evaluated using eye diagrams, also known as eye patterns. Eye diagrams are representations of digital signals that provide minimum and maximum voltage levels as well as signal jitter. Eye diagrams expose issues in USB data transmission integrity.
An eye diagram is produced by repetitively sampling a digital signal on an oscilloscope's vertical axis, while triggering the horizontal time sweep with the data rate. The resulting pattern looks like an eye, as shown in Figure 1. The larger the eye the better the data signal integrity. Acceptable signal qualities are often defined with the use of a mask that consists of a hexagon in the middle of the eye and rectangles above and below the eye. If the measured traces cross the mask boundaries the signal quality is considered unacceptable. USB 2.0 signal mask specifications are provided by the USB Implementers Forum (USB Specification Rev. 2.0, Section 7.1.2.2). Figure 1 displays an eye diagram with details of critical points.


Evaluation
Using a USB 2.0 signal at 480Mbps, eye diagrams of three different protection devices with different ranges of capacitance were measured and compared with the USB 2.0 mask. A board without a device was also evaluated for comparison and reference. Comparing the eye diagrams for different protection devices with the diagram for no protection device demonstrates the extent of signal degradation caused by the protection device. It should be noted that this article only takes into account the capacitance of the ESD protection diode and its effect on the USB2.0 high speed signal. In a practical design there would also be capacitance added by other components on the line or by the board itself.

Figure 2 illustrates the test signal without a protection device. This represents a pure USB2.0 high speed signal with no degradation since there is no capacitance added to the line.
In comparison, Figure 3 illustrates an eye diagram of the USB2.0 high-speed signal with a 0.5pF capacitance ESD device added. The eye diagram reveals no major changes or differences in the signal. The 0.5pF ESD device has negligible adverse effect to the integrity of the data signal since the capacitance value is so low. This gives a designer an ESD protection option that will offer maximum flexibility with the capacitance budget to add other components.




