The HDMI Design Guide: A short compendium for successful high-speed PCB design in HDTV receiver applications

Layer stack
The pin-out of a HDMI mux-repeater is tailored for the design in HDTV receiver circuits (see Figure 1). Each side of the package provides a HDMI port, featuring four differential TMDS signal pairs, thus resulting in three input and one output port. The remaining signals comprise the supply rails, Vcc and ground, and lower speed signals such as the I2C interface, Hotplug-detect and the mux-selector pins.

A minimum of four layers are required to accomplish a low EMI PCB design (see Figure 2). Layer stacking should be in the following order (top-to-bottom): TMDS signal layer, ground plane, power plane and control signal layer.

• Routing the high-speed TMDS traces on the top layer avoids the use of vias (and the introduction of their inductances) and allows for clean interconnects from the HDMI connectors to the repeater inputs, and from the repeater output to the subsequent receiver circuit.
• Placing a solid ground plane next to the high-speed signal layer establishes controlled impedance for transmission line interconnects and provides an excellent low-inductance path for the return current flow.
• Placing the power plane next to the ground plane creates additional high-frequency bypass capacitance.
• Routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal links usually have margin to tolerate discontinuities such as vias.

If an additional supply voltage plane or signal layer is needed, add a second power / ground plane system to the stack to keep it symmetrical. This makes the stack mechanically stable and prevents it from warping. Also the power and ground plane of each power system can be placed closer together, thus increasing the high-frequency bypass capacitance significantly.