Design Article
Omap2420 antes up for handsets
Peter DiPaolo
11/14/2005 10:00 AM EST
During some downtime at the San Francisco Airport, fresh from the latest CTIA Wireless IT & Entertainment conference, I had a moment to reflect on the flurry of presentations and sermons. It struck me that even with purposeful positioning from most of the companies present this year, they had all converged (pardon the tech pun) on the same theme: voice, data apps, music and video, all done wirelessly. That makes my life a little easier as I sit down to write a review of Texas Instruments' Omap2420 application processor, because the theme really summarizes how TI has positioned itself in this segment.
See image: TI’s multicore application processor is built on a 90-nm process and revs the clock from 220 to 330 MHz.
The Omap2420 is geared for high-end handsets based on Linux, Windows and Symbian operating systems. It is the first in the Omap 2 family of products, which eventually will move into the combined "modem and application processor" arena. Probably the most popular aspects of this chip are its multiprocessor cores-a 330-MHz ARM11 RISC, a 220-MHz TI C55 DSP, an imaging and video processor that embeds an ARM7, and an Imagination Technologies 3-D graphics processor-and its support for 166-MHz mobile double-data-rate SDRAM. The part integrates display and camera controllers, SDRAM and flash controllers, and more than 60 additional peripheral controllers. The 2420 offers superb support for high-end multimedia apps, including 30-frame/second Common Intermediate Format (CIF) videoconferencing, 30-fps VGA decoding or encoding, VGA and TV display, and 3-megapixel-plus cameras. Phones incorporating the part have been in design for some time and are about to hit the market.
The most critical facet of the 2420's design differentiation from the last several generations of TI Omap application processors is the process shrink from 130 to 90 nanometers. In addition, the ARM core performance has improved: Previous Omap chips supported speeds of up to 220 MHz; the 2420 bumps that up to 330 MHz. TI has increased the total cache size and overall memory bandwidth, in addition to moving from an ARM9 to an ARM11 RISC.
The Omap2420 increases the 3-D graphics performance by 40 to 50 times and the video by 10x. Multitasking is made more robust through parallel processing.
The 2420 is a multicore design, and TI has made it clear that going forward the company will shoot for supporting as many cores as are required by the application. So it seems parallel processing-or multicore processing-is TI's road to the future for handset applications.
Special layout-level implementations in the 2420 accommodate the multiengine processing and power-management functions TI implemented. TI moved to a standardized interconnect approach called the Open Core Protocol. OCP is owned by OCP-IP, an independent, not-for-profit standards body.
OCP facilitates core reuse and makes the cores independent of the integrated subsystems. The approach also implements one set of timing rules for use throughout the chip, as well as a single set of validation tools. OCP allows intellectual-property blocks to be moved around in the system if required during design, which makes system analysis and chip debug much more simple and straightforward.
The Omap2420's power-management techniques allow the processors' power consumption to be optimized for each of their respective applications. At the die level, TI incorporated multiple power domains, with each area capable of powering down to zero leakage to yield extremely long battery life. Many of the power-management techniques implemented in the Omap2420 are part of TI's new SmartReflex suite.
At the transistor and software level, TI has paid special attention to accommodating zero-leakage levels. The architecture can switch off power to individual areas through the use of power switches placed strategically throughout the die, which helps TI achieve the needed granularity. There are also special embedded "diode-footed SRAM" switches to reduce power usage in the embedded memory.
Since power usage scenarios can be dynamically changed by the end user, TI has allowed for software-programmable power modes for different applications by making use of voltage and frequency scaling. An "off" mode can be defined to achieve the lowest power state.
Semiconductor Insights is currently analyzing the Omap2420. We have identified TI's two-pass power switch control circuits and are in the process of analyzing the circuits' impact on overall power management within the autorouted circuitry. SI die analysis has revealed the locations of the ARM core, DSP core and graphics accelerator. Suspected locations of the memory controller, the TMS320C55x DSP, the power-management block and the imaging video accelerator have also been identified.
With five memory types, the total embedded memory takes up almost one-quarter of the 2420 die, whereas the Omap1710 had roughly 17 percent coverage with four different memory types. The Omap2420 die is about 1.9x larger than the Omap1710, however, so the higher integration required a trade-off in die area.
From the software perspective, TI has the code working in two dimensions to help manage power activity. First, the software is aware of which applications are being used based on the workload being monitored. Second, the software collects statistics to determine workload scenarios. This enables prediction-based power management based on real usage patterns.
TI is working on the Omap migration to 65 nm, where additional process issues come into play that affect leakage. It is known that TI has multiple 90-nm processes-some using high-leakage transistors, others with low leakage-so one can assume the same strategy will apply at 65 nm. TI can also compensate for additional leakage issues at the system level, so expect to see some unique circuit implementations to address leakage at 65 nm.
Rounding out the power-management design is an accompanying energy-management device, the TWL92230. Designed in a 250-nm analog BiCMOS process, the device offers some specific functions, such as on-board voltage regulators and dc/dc converters, that complement the 2420.
Indeed, the TWL92230 was specifically designed for use with the 2420 and contains special protection mechanisms that are in tune with the latest Omap. Those include a hot-die temperature gauge and thermal shutdown protection to allow the TWL92230 to turn off its own dc/dc converters and then send an interrupt to the 2420. Such capability is essential for handheld devices as form factors shrink.
The TWL92230 also collapses many external chips and discrete components into a single IC.
TI overcame numerous challenges in getting the 2420 into silicon. According to the company, the complexity of the layout was the most challenging aspect as TI moved to final design approval. The project also proceeded at the bleeding edge, using the newest beta versions of standard tools for verification.
Memory
TI supports package-over-package (POP) memory stacking for the Omap2040. POP stacks one package directly on top of another, with direct connectivity of the packaging materials. Memory stacking, however, presents some challenges. Since leakage is related to heat, placing another chip on top of the Omap2420 adds heat to the overall system.
This is where the SmartReflex techniques come into play. To ensure compatibility and stability, TI has simulated different memory vendors' offerings for coupling the Omap2420 with the appropriate SRAM or mobile DDR device in either POP or standard stacked-die form.
From TI's perspective, POP is a business model. POP lets customers negotiate with a range of memory vendors, freeing TI from pushing support for a particular memory.
The latest NAND flash devices from Samsung raise the question of whether there is a limit to the amount of memory that can be interfaced. One might also wonder which memory configurations customers will use, since both NAND flash and NOR flash seem to be coming into their own. No need to worry here, as TI supports various configurations and types of flash, including up to 1 Gbyte of NAND or NOR, as well as up to 1 Gbyte of mobile DDR. Even with NAND gaining popularity for mass storage in high-end handsets, TI still views NOR as a contender.
All in all, TI has really pushed the boundaries of design with the Omap2420 to accommodate what the company says are some wild applications coming down the pike. High-quality 3-D games, running in parallel with high-quality audio, all while hooking up the OMAP2420 to a standard TV for full-screen gaming, would not be uncommon, according to the company. TI has also claimed the ability to run both graphics and video processors in parallel on two displays. And it claims to have the 2420 pumping out audio, video and 3-D gaming, all running in parallel on one high-level OS and all using the same memory device.
Although TI has been aggressive in getting the Omap2420 out to market, it is not without competitors in this sector. Broadcom this year announced its BCM2705 multimedia processor, while Nvidia and ATI Technologies both continue to produce designs in this category to compete with TI. Qualcomm also continues its focus of mixing high-end multimedia capabilities with baseband functionality.
But TI, with the Omap2420, has pushed the boundaries of overall integration and functionality. Expect the 2420 processor to help the company maintain a position at the forefront of the application processor arena.
The Omap2420 will start production in higher-end phones and will migrate to lower-end phones as the market moves forward. Phones integrating the processor will hit the market in a month or two.
By Peter DiPaolo (peterd@semiconductor.com), technology manager in the TECHinsights group of Semiconductor Insights (Kanata, Ontario)



