Linear regulators - matching the device to the application

The major parameters that affect system performance can be broken down into three major categories: DC performance, AC performance and package. The DC performance category encompasses the actual regulation of the LDO along with ground (quiescent) current and dropout voltage. The output voltage accuracy term seems obvious enough, but there are multiple factors that sum together to form the overall DC accuracy of the LDO. The AC performance category is a sum of all the different AC parameters that directly affect the integrity of the output voltage. And the choice of package is obviously the type of package required for the application. Packaging is clearly an important factor, but by no means an easy parameter to specify.

DC Performance and Accuracy

When specifying an LDO regulator or any type of regulator, specifying the DC performance of the regulator is first and foremost in the design. The key is in understanding the DC requirements of the load being regulated, and then using that understanding of that load to select the appropriate regulator. Whether the load needs high accuracy on the output voltage, or if the headroom, or dropout voltage, of the overall circuit is very low can be deciding factors in which regulator is chosen for the application.

DC accuracy refers to the total deviation in output voltage acceptable for the application. Many processors require fairly tight DC regulation, around 5 percent total. Although not applicable to low power LDOs, networking processors still typically require an absolute maximum tolerance of plus-minus 10 percent including all possible deviations, both DC and AC. This means that the output of the voltage regulator must never go above or below the nominal output voltage by 10 percent. Seems easy enough, however when the total combination of DC and AC accuracy components are combined with losses in the PCB that incur when routing higher currents to the actual supply voltage pins of the ICs are being powered, achieving this level of total accuracy is quite difficult. For mobile applications — especially mobile communications applications such as mobile phones or wireless LAN — the accuracy of the output voltage is critical - more for performance reasons than it is for maintaining the required tolerance of the IC manufacturers.

When optimizing a mobile system for best performance over the operating life of a typical lithium-ion battery, a system designer may find that the system works best at full battery charge (4.2V) with the RF section operating at 3.0V supply voltages. However, the full operating range of a lithium-ion battery is as low as 3.0V, meaning that the RF section must operate at a lower voltage in order to be able to maintain regulation and provide reasonable performance. Most RF sections of mobile phones today regulate at 2.85V and must maintain 3 to 5 percent overall accuracy. The LDO that regulates that voltage should maintain tight initial accuracy of 1 percent with a worst case temperature variation of 2 percent, in order to allow for design margin and prevent the output voltage of the regulator from ever exceeding the maximum tolerance limits for the circuit design.

Two other factors impact the overall accuracy due to DC variations. Line regulation is the measure of output voltage change dependent upon the change of the input supply voltage. For example, in a mobile phone, if the input voltage changes from 4.2V (max charge) to 3.2V (min charge), the output voltage will change because the internal bias settings of the regulator will change. Most regulators have excellent line regulation because the control loops are designed with sufficient gain to correct the output voltage for these variations on the input supply. Some LDO regulators with low loop gain may exhibit poor line regulation as a result of that low loop gain.

The equation for output voltage change relative to the input voltage is:

%Delta V = {[(Vout high " Vout low)]/(Vout@Vinhigh)}*100

This can also be expressed as a term relative to the change in input voltage. This being for regulators that have a wide input operating range for applications that may operate a nominal 5V or 12V input, but have supply ranges as high as 24V or 28V during surges. The line regulation term can be expressed relative to the absolute change of the input voltage in %/V:

%DeltaV/V = {{[(Vout high " Vout low)]/(Vout@Vinhigh)}/(Vinhigh " Vinlow)}*100

Load regulation is a critical term that expresses the output voltage change when the load current changes from one level to another. If the regulator is providing 100 μA and the load changes to150mA, the output voltage will show a DC change with respect to that output current change. This is due to changes in biasing related to the higher current. Once again, the amount of change in the output voltage is virtually directly proportional to the amount of open loop gain in the error amplifier. The more loop gain, the better the loop can correct for small variations on the output. If the loop gain is very low, the output voltage will not correct as much and the deviation in output voltage will be significantly larger. The benefits of higher loop gain are obvious, but the disadvantages of higher loop gain are not as obvious, particularly to the end user. Higher loop gain usually results in a much more complicated design in order to prevent having too much gain at high frequency, resulting in oscillation. There is usually a trade-off when working with such high gain in that the loop isn't as stable as a lower gain loop that may have worse performance. Achieving the right balance between loop gain and stability is critical when design a high performance LDO for applications such as RF power supplies.

The load regulation is typically expressed in two forms, an absolute percentage change specified over a fixed current range, or in a percent per milliamp term which expresses the amount of output voltage change to be expected per milliamp.

%Delta V = [(V_{out max load} " V_{out min load})/(V_{out min load})] * 100

or

%Delta V/mA = {[(V_{out max load} " V_{out min load})/(V_{out min load})]/(I_{out max} I_{out min})} * 100

The total DC accuracy can be seen as a sum of the parts.

The MIC5305 is an example of a regulator that has excellent regulation characteristics and it can achieve extremely high levels of accuracy. Figure 1 shows the breakdown of its total accuracy into the sum of the three parts, initial and over temperature accuracy with load regulation and line regulation. Most regulators have load regulation such that when the load increases the output voltage goes down, so the load regulation term will almost exclusively pull the output voltage down from whatever nominal voltage it is regulating to. But most manufacturers specify it in both directions, so the example shows both positive and negative load regulation.

Figure 1. Total DC accuracy of an LDO can be seen as a sum of the parts including load and line regulation, as well as variations over temperature.

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Dropout Voltage and Ground Current

Dropout voltage is defined as the minimum voltage required between output and input voltage in order to keep the LDO in proper regulation. With the majority of low dropout regulators, the pass transistor is a PNP bipolar transistor or a P-channel MOSFET. The PNP pass transistors have a dropout voltage defined by the Vce (collector-emitter voltage) saturation characteristics. Most PNP LDOs will saturate at their maximum designed output currents with a dropout voltage (saturation voltage) of 200 to 300mV. The P-channel MOSFET equivalent LDOs have a dropout voltage dependent upon the Rds(on) of the P-channel device. This is a bit harder to specify because now the dropout is dependent upon the channel resistance of the PMOS transistor which, in turn, is directly proportional to the gate-to-source voltage. In virtually all PMOS LDOs, the gate-to-source voltage is essentially the input voltage to ground. The source of the PMOS device is always the input voltage and in order to fully enhance the PMOS device, the gate has to be driven as close as possible to ground. Therefore, the maximum V_gs of the PMOS device is defined by the differential ground " input voltage. The dropout voltage of the PMOS-based LDO regulator will vary directly with the input voltage.

One advantage the PMOS regulators have is that the process technology for PMOS transistors is much smaller than the closest PNP equivalent and very low R_ds(on) values are achievable in very small areas. Therefore, a very low dropout voltage can be achieved within a reasonable silicon area with PMOS where the PNP device would have to be significantly larger.

The benefit of lower dropout voltage in a mobile system is that a much lower input voltage is required to maintain the same level of performance on the output. For example, if the dropout voltage at 150mA of output current is 300mV, then the minimum required input voltage to maintain regulation of a 3.0V output at 150mA of output current is 3.3V. But, this is where the pass transistor (PNP or PMOS) is fully on and the loop has lost most of its characteristics and now appears to be a linear switch - all noise on the input will pass straight through to the output. If the input drops below 3.3V, the output voltage will track the input voltage minus the drop of the dropout voltage. In order to maintain good performance, the regulator needs some additional headroom on top of the dropout voltage to keep the pass transistor in a region where it can reject input noise and respond to input and output transients.

Ground current is the measure of current required by the LDO to function. It typically includes all bias currents required by the LDO and any drive current for the pass transistor. Ground current is the only parameter that is directly affected by the choice of pass transistor. The main characteristic in choosing a PNP transistor for the output device of a linear regulator is its gain characteristics, or beta. The beta factor for a PNP pass transistor determines the amount of current required to drive the base of the PNP while supplying load current. If the beta is around 100, the base current (or ground current in an LDO) for a 100mA load will be 1mA. Therefore, the overall ground current of the LDO will be the sum of the bias current plus the base current. In a PMOS based LDO, the pass transistor is voltage controlled and doesn't have the same current requirements the PNP. Therefore, the current at no load could be equal to the current at full load because there is no requirement to drive the gate of the PNP with current, only voltage. Therefore, PMOS based LDOs have lower ground current at full load compared to the PNP based LDOs.

The bias current (independent of technology) is usually proportional to performance. A very low bias current LDO will usually have lower loop gain and therefore worse accuracy. They typically also have worse AC performance for parameters such as power supply ripple rejection, transient response and self noise.

AC Performance

There are many AC parameters that affect the system performance. The three major parameters that dominate the system performance for mobile applications are transient response, power supply ripple rejection and self noise. The other major AC parameter which is not be discussed here - but which is equally as critical - is loop stability. Without a stable operating loop, all the other parameters are unimportant.

Power supply ripple rejection, or PSRR, is a measure of the regulator's ability to reject input noise at a specific frequency. It is a measure relative to frequency and it is always expressed in dB. The basic equation for PSRR is as follows:

PSRR(dB) = 20_log (V_out/V_in)

Where V_out and V_in are DC voltages measured at a specific frequency. The importance of this parameter in a battery-powered application may not be obvious. Batteries give an ideal voltage source when there are no perturbations in that voltage source. Lithium-ion batteries have a reasonable amount of output impedance compared to other battery technology and the output voltage will actually show a large variation based on the current drawn from that battery. In GSM (Global System for Mobile Communications), the transmit and receive cycles in the RF draw a huge amount of current from the battery, causing a large change in voltage on the output of the battery. That change in voltage is seen throughout the system and on the inputs to all of the regulators in the system. The regulators powering noise sensitive circuits such as the RF chipsets must be able to reject that large change in supply voltage so that the RF circuitry doesn't modulate that noise into the RF output and cause interference between adjacent operating channels, or users (Figure 2 " MIC5305 PSRR).

Figure 2. With the right amount of power supply rejection ratio (PSRR), LDOs are suitable for RF applications like GSM cell phones.

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With the right amount of PSRR, this interference can be prevented and the RF section will function without problems. One additional issue when designing with a lithium-ion battery system is that the usable range of the battery is between 3.0V and 4.2V and the output impedance of that battery goes up when the voltage drops and at low temperatures. What that means is that at low supply voltages and cold temperatures, the changes in the output voltage of the battery, with the same change in current caused by the actual transmission of data through the power amplifier of a GSM system, will be much larger. With the same PSRR level, the output of the regulator will have more noise than at nominal battery voltage and nominal temperature. The necessary PSRR level required to maintain good RF sensitivity under extreme conditions is very high. For this type of application, attention must be paid to the PSRR specification of the LDO under all possible conditions to make sure that the proper LDO is being selected for the application.

Transient Response

All power supplies take some finite amount of time to respond to changes. Just like we humans take time to respond to stimuli, regulators take time to realize what is happening and react. When the input voltage to a regulator is suddenly changed, the output voltage will start to move because, virtually instantaneously, all of its bias points and steady state conditions have changed. As a consequence of these changes, the output will start to change as well. The transient response of the regulator determines the amount of time it takes for the LDO to realize that its output has changed combined with the amount of time it takes the LDO to start pulling the output back into nominal regulation. This factor depends on many different design criteria such as bias currents and slew rates of amplifiers, as well as the amount of output capacitance the loop is designed to work with. The more output capacitance, the less voltage change the output of the regulator will see. Likewise for a change in output current. When the output of the regulator sees a large change in output current, the output capacitor discharges until the regulator reacts to the changing current and voltage on the output and pulls the output back into regulation.

Figure 3 (Load Transient Response Analysis) shows a breakdown of the contributions of the output capacitor to the load transient response along with the contribution of the output capacitor in analyzing that output transient response. The analysis of the output voltage during a transient response, gives an exaggerated view of the output voltage during a current transition from a light load to a heavy load. First, the output voltage will change by the instantaneous current change times the ESR (equivalent series resistor) of the output capacitor. The larger the change in current (di) and/or the larger the ESR of the output capacitor, the larger the instantaneous droop across the output capacitor.

Figure 3. Load Transient Response Analysis shows the voltage drop that comes in response to a current step.

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This is effectively the only limitation in the output capacitor supplying current to the output load. If the change in output current occurs at a significantly high slew rate (or small change in time dt), then the drop in the output capacitor due to the ESR will be larger as the output capacitor's ESR varies with frequency. The loop response of the regulator can be noted when responding to a load change by noting the voltage droop on the output and the time it takes for the droop to start correcting. Analyzing the load transient response will give a fairly accurate estimate of the large signal bandwidth of the loop.

In order to achieve wide large signal bandwidth, the regulator will have to consume a significant amount of current itself in order to broadband the amplifiers as well as giving the loop significant slew rate capability. Normally, when designing a low power regulator, the currents scale down significantly and the load transient response scales down as well. The images in Figures 4a (MIC5305 Load Transient Response) and 4b (MIC5235 Load Transient Response) show the transient response of a 150mA regulator with 90μA of quiescent current (MIC5305) vs. the transient response of a 150mA regulator with 18μA of quiescent current (MIC5235). The 18μA regulator has a significant amount of output capacitance and it still has more voltage droop because it requires a significantly larger amount of time to respond to load changes. The MIC5305 regulator has a significantly faster transient response and has less voltage droop even though the output capacitor is a lower value than that of the MIC5235.

Figure 4. The transient load response of the MIC5235 (top) is slower than the MIC5305 (bottom). Because of its capacitance, the 18μA takes a significantly larger amount of time to respond to load changes.

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